CUDA Programming: A Developer's Guide to Parallel Computing with GPUsNewnes, 28 груд. 2012 р. - 600 стор. If you need to learn CUDA but don't have experience with parallel computing, CUDA Programming: A Developer's Introduction offers a detailed guide to CUDA with a grounding in parallel fundamentals. It starts by introducing CUDA and bringing you up to speed on GPU parallelism and hardware, then delving into CUDA installation. Chapters on core concepts including threads, blocks, grids, and memory focus on both parallel and CUDA-specific issues. Later, the book demonstrates CUDA in practice for optimizing applications, adjusting to new hardware, and solving common problems.
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З цієї книги
Результати 6-10 із 80
Сторінка 36
... write a volume on parallel processing, for there are entire books devoted to this subject. We want readers to have ... writing over one another's data. Such algorithms are never needed for serial based programming. With parallelism comes ...
... write a volume on parallel processing, for there are entire books devoted to this subject. We want readers to have ... writing over one another's data. Such algorithms are never needed for serial based programming. With parallelism comes ...
Сторінка 46
... write better code than buy additional hardware. Parallel programming, even today, is very much tied to the hardware. If you just want to write code and don't care about performance, parallel programming is actually quite easy. To really ...
... write better code than buy additional hardware. Parallel programming, even today, is very much tied to the hardware. If you just want to write code and don't care about performance, parallel programming is actually quite easy. To really ...
Сторінка 47
... write to on the CPU with the buffer being processed on the GPU. GPU-to-CPU and CPU-to-GPU transfers are made over the relatively slow (5 GB/s) PCI-E bus and this dual-buffering method largely hides this latency and keeps both the CPU ...
... write to on the CPU with the buffer being processed on the GPU. GPU-to-CPU and CPU-to-GPU transfers are made over the relatively slow (5 GB/s) PCI-E bus and this dual-buffering method largely hides this latency and keeps both the CPU ...
Сторінка 50
... write programs that work well on GPU hardware. It also allows for applications that do not follow a known memory pattern at compile time. However, to exploit the cache, the application either needs to have a sequential memory pattern or ...
... write programs that work well on GPU hardware. It also allows for applications that do not follow a known memory pattern at compile time. However, to exploit the cache, the application either needs to have a sequential memory pattern or ...
Сторінка 51
... write to exactly one bank of 32 bits in the shared memory without causing a shared bank conflict. Compute. 2.1 ... writing, still largely unreleased. A discussion of the Kepler features already announced can be found in Chapter 12, under ...
... write to exactly one bank of 32 bits in the shared memory without causing a shared bank conflict. Compute. 2.1 ... writing, still largely unreleased. A discussion of the Kepler features already announced can be found in Chapter 12, under ...
Зміст
Chapter 8 MultiCPU and MultiGPU Solutions | 267 |
Chapter 9 Optimizing Your Application | 305 |
Chapter 10 Libraries and SDK | 441 |
Chapter 11 Designing GPUBased Systems | 503 |
Chapter 12 Common Problems Causes and Solutions | 527 |
Index | 565 |
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CUDA Programming: A Developer's Guide to Parallel Computing with GPUs Shane Cook Обмежений попередній перегляд - 2012 |
Загальні терміни та фрази
256 threads algorithm allocate application array atomic atomic operations blockDim.x blockIdx.x bytes calculation compiler compute 2.x const int const u32 constant memory copy CUDA CALL cuda CUDA cores dataset device device_num elements example execution Fermi Figure function GB/s GeForce GTX 470:GMEM global memory GMEM hardware host memory ID:0 GeForce GTX InfiniBand instruction issue iterations Kepler kernel L1 cache latency Linux look loop malloc Memcpy memory access memory bandwidth memory fetch merge sort node num_elem num_elements num_threads number of blocks number of threads NVIDIA OpenMP operation optimization output Parallel Nsight parameter PCI-E performance pointer prefix sum problem processor radix sort reduce registers result serial shared memory SIMD simply single SP SP SP speedup stream synchronization Tesla threadIdx.x threads per block transfer typically uint4 unsigned int usage version is faster void warp write þ¼