CUDA Programming: A Developer's Guide to Parallel Computing with GPUsNewnes, 28 груд. 2012 р. - 600 стор. If you need to learn CUDA but don't have experience with parallel computing, CUDA Programming: A Developer's Introduction offers a detailed guide to CUDA with a grounding in parallel fundamentals. It starts by introducing CUDA and bringing you up to speed on GPU parallelism and hardware, then delving into CUDA installation. Chapters on core concepts including threads, blocks, grids, and memory focus on both parallel and CUDA-specific issues. Later, the book demonstrates CUDA in practice for optimizing applications, adjusting to new hardware, and solving common problems.
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З цієї книги
Результати 6-10 із 89
Сторінка 34
... threads, yet there are six data items in the queue. Why not fork six threads? The reality is that in most problems ... number of logical processor threads available as the number of processes to fork. As CPU threads are typically also ...
... threads, yet there are six data items in the queue. Why not fork six threads? The reality is that in most problems ... number of logical processor threads available as the number of processes to fork. As CPU threads are typically also ...
Сторінка 35
... threads, typically 256 or 512 threads per block. A number of SMs exist on a single GPU and share a common global memory space. Together as a single GPU they can operate at peak speeds of up to 3 teraflops/s (GTX680). While peak ...
... threads, typically 256 or 512 threads per block. A number of SMs exist on a single GPU and share a common global memory space. Together as a single GPU they can operate at peak speeds of up to 3 teraflops/s (GTX680). While peak ...
Сторінка 70
... number of CPU cores available. You might, for example, have each CPU core calculate one “frame” of data where there are no interdependencies between frames. You may also choose ... numbers of threads,. 70 CHAPTER 5 Grids, Blocks, and Threads.
... number of CPU cores available. You might, for example, have each CPU core calculate one “frame” of data where there are no interdependencies between frames. You may also choose ... numbers of threads,. 70 CHAPTER 5 Grids, Blocks, and Threads.
Сторінка 71
... numbers of threads, such as GPUs. CPUs, by contrast, also support threads, but with a large overhead and thus are considered to be useful for more coarse-grained parallelism problems. CPUs, unlike GPUs, follow the MIMD (Multiple ...
... numbers of threads, such as GPUs. CPUs, by contrast, also support threads, but with a large overhead and thus are considered to be useful for more coarse-grained parallelism problems. CPUs, unlike GPUs, follow the MIMD (Multiple ...
Сторінка 72
... number of cores (SMs) over a typical quad core CPU, but also a 32 times ... threads. Task. execution. model. There are two major differences in the task execution model. The first ... threads, let's look. 72 CHAPTER 5 Grids, Blocks, and ...
... number of cores (SMs) over a typical quad core CPU, but also a 32 times ... threads. Task. execution. model. There are two major differences in the task execution model. The first ... threads, let's look. 72 CHAPTER 5 Grids, Blocks, and ...
Зміст
Chapter 8 MultiCPU and MultiGPU Solutions | 267 |
Chapter 9 Optimizing Your Application | 305 |
Chapter 10 Libraries and SDK | 441 |
Chapter 11 Designing GPUBased Systems | 503 |
Chapter 12 Common Problems Causes and Solutions | 527 |
Index | 565 |
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CUDA Programming: A Developer's Guide to Parallel Computing with GPUs Shane Cook Обмежений попередній перегляд - 2012 |
Загальні терміни та фрази
256 threads algorithm allocate application array atomic atomic operations blockDim.x blockIdx.x bytes calculation compiler compute 2.x const int const u32 constant memory copy CUDA CALL cuda CUDA cores dataset device device_num elements example execution Fermi Figure function GB/s GeForce GTX 470:GMEM global memory GMEM hardware host memory ID:0 GeForce GTX InfiniBand instruction issue iterations Kepler kernel L1 cache latency Linux look loop malloc Memcpy memory access memory bandwidth memory fetch merge sort node num_elem num_elements num_threads number of blocks number of threads NVIDIA OpenMP operation optimization output Parallel Nsight parameter PCI-E performance pointer prefix sum problem processor radix sort reduce registers result serial shared memory SIMD simply single SP SP SP speedup stream synchronization Tesla threadIdx.x threads per block transfer typically uint4 unsigned int usage version is faster void warp write þ¼