CUDA Programming: A Developer's Guide to Parallel Computing with GPUsNewnes, 28 груд. 2012 р. - 600 стор. If you need to learn CUDA but don't have experience with parallel computing, CUDA Programming: A Developer's Introduction offers a detailed guide to CUDA with a grounding in parallel fundamentals. It starts by introducing CUDA and bringing you up to speed on GPU parallelism and hardware, then delving into CUDA installation. Chapters on core concepts including threads, blocks, grids, and memory focus on both parallel and CUDA-specific issues. Later, the book demonstrates CUDA in practice for optimizing applications, adjusting to new hardware, and solving common problems.
|
З цієї книги
Результати 1-5 із 83
Сторінка vii
... Memory Handling with CUDA.................................................... 107 Introduction ... Global Memory ..................................................................................................
... Memory Handling with CUDA.................................................... 107 Introduction ... Global Memory ..................................................................................................
Сторінка 24
... global memory. It can also be performed in a somewhat restricted way through atomic operations to or from global memory. CUDA splits problems into grids of blocks, each containing multiple threads. The blocks may run in any order. Only ...
... global memory. It can also be performed in a somewhat restricted way through atomic operations to or from global memory. CUDA splits problems into grids of blocks, each containing multiple threads. The blocks may run in any order. Only ...
Сторінка 26
... (global memory), fetch the needed item, and return. Neither the tradesperson nor the client knows how long (the latency) this operation will actually take. There may be congestion on the freeway and/or queues at the hardware store (other ...
... (global memory), fetch the needed item, and return. Neither the tradesperson nor the client knows how long (the latency) this operation will actually take. There may be congestion on the freeway and/or queues at the hardware store (other ...
Сторінка 27
... shared memory approach is eviction and dirty data. Data in a cache is said to be dirty if it has been written by the program. To free up the space in the cache for new useful data, the dirty data has to be written back to global memory ...
... shared memory approach is eviction and dirty data. Data in a cache is said to be dirty if it has been written by the program. To free up the space in the cache for new useful data, the dirty data has to be written back to global memory ...
Сторінка 42
... Memory (global, constant, shared) • Streaming multiprocessors (SMs) • Streaming processors (SPs) The main thing to notice here is that a GPU is really an array of SMs, each of which has N cores (8 in G80 and GT200, 32–48 in Fermi, 8 ...
... Memory (global, constant, shared) • Streaming multiprocessors (SMs) • Streaming processors (SPs) The main thing to notice here is that a GPU is really an array of SMs, each of which has N cores (8 in G80 and GT200, 32–48 in Fermi, 8 ...
Зміст
Chapter 8 MultiCPU and MultiGPU Solutions | 267 |
Chapter 9 Optimizing Your Application | 305 |
Chapter 10 Libraries and SDK | 441 |
Chapter 11 Designing GPUBased Systems | 503 |
Chapter 12 Common Problems Causes and Solutions | 527 |
Index | 565 |
Інші видання - Показати все
CUDA Programming: A Developer's Guide to Parallel Computing with GPUs Shane Cook Обмежений попередній перегляд - 2012 |
Загальні терміни та фрази
256 threads algorithm allocate application array atomic atomic operations blockDim.x blockIdx.x bytes calculation compiler compute 2.x const int const u32 constant memory copy CUDA CALL cuda CUDA cores dataset device device_num elements example execution Fermi Figure function GB/s GeForce GTX 470:GMEM global memory GMEM hardware host memory ID:0 GeForce GTX InfiniBand instruction issue iterations Kepler kernel L1 cache latency Linux look loop malloc Memcpy memory access memory bandwidth memory fetch merge sort node num_elem num_elements num_threads number of blocks number of threads NVIDIA OpenMP operation optimization output Parallel Nsight parameter PCI-E performance pointer prefix sum problem processor radix sort reduce registers result serial shared memory SIMD simply single SP SP SP speedup stream synchronization Tesla threadIdx.x threads per block transfer typically uint4 unsigned int usage version is faster void warp write þ¼